This invention relates generally to a method and apparatus for asynchronous data synchronizing and tracking, and more particularly, to a method and apparatus for asynchronous data synchronizing and tracking that utilizes a plurality of clocks oscillating at different phases to set up a plurality of sampling windows for receiving asynchronous data therein, and to develop an synchronous clock based on the particular sampling window in which the data was received.
There are many applications where there is a need to synchronize and track a stream of asynchronous data. For example, when data is transmitted from a servo device, such as a hard disk or a floppy disk, the transmitted data is generally asynchronous. Part of the reason for the asynchronous nature of the data stream at the output of a servo device is that the speed of the rotating disks varies, and accordingly, this variation will modulate the signal as the reading head picks up the data. Other reasons for the asynchronous nature of the servo device output data stream include variations due to noise, movement of the device, and electromagnetic interference.
Many devices require synchronous data for reading and processing such data as it is received. Such devices include memory devices, microprocessors, video devices and so forth. Specifically, these devices receive data by having the data clocked in. Thus, a clock in synchronous with the data is required. If the clock is at a constant frequency, then the data rate of the data stream should also follow the frequency of that clock. An asynchronous data stream would be virtually useless to these devices since these devices cannot tell at what particular time the data is available for receiving it. This is especially true if numerous consecutive zeros is being received, where a zero is represented as an absence of a pulse. Hence, there is a need to synchronize asynchronous data to a clock.
Furthermore, the servo device output data stream can also have a drift in the rate the data is being transmitted. In other words, on top of the random variation of the data rate of the servo device data stream due to rotational variations, movement and noise, the data rate may have a drift due to aging of the rotating motor or components of the servo device. This drift can also be a problem for devices that require incoming synchronous data for reading and processing. Thus, not only is there a need for synchronizing the asynchronous data stream and developing a synchronous clock therefrom, there is also a need for tracking any drift in the data stream for maintaining the data in synchronous with the clock.
A prior art technique for synchronizing and tracking asynchronous data stream is to use a phase lock loop system. A phase lock loop system generally comprises a feedback loop consisting of a phase detector, an integrator for filtering the output signal of the phase detector and an oscillator responsive to the phase detector filtered output signal for generating a clock having a phase-time relationship that varies as a function of said signal. The clock is fed back to the input of the phase detector and is compared to the asynchronous data stream applied to the other input of the phase detector. The comparison of the clock phase to the data stream phase by the phase detector produces an error signal at its output which is applied to the oscillator by way of the filter. The error signal causes the oscillator to produce a clock signal that tracks the phase of the incoming data stream.
A short coming of this technique is that for the phase lock loop system to work well, the frequency of the clock should be numerous times faster than the data rate of the incoming asynchronous data stream. Thus, there is a need to develop a technique for synchronizing and tracking asynchronous data stream that does not require generating a clock having a frequency numerous times the data rate of the asynchronous data stream.
A further short coming of the phase lock loop technique is that there is an associated capture time with the phase lock loop for synchronizing its clock to the input asynchronous data stream. The capture or locking time of a phase lock loop system is a function of the phase detector, integrator or filter and the responsive of the oscillator. In the usual case, during the time where the phase lock loop attempts to lock with the incoming asynchronous data stream, numerous clock cycles may have been generated. Usually, it is desirable to eliminate this delay in locking to the asynchronous data stream since a faster system would result.
It is an object of this invention to provide a method and apparatus for synchronizing and tracking a data stream and generating a synchronous clock therefrom.
It is another object of this invention to provide a method and apparatus for synchronizing and tracking a data stream and generating a synchronous clock therefrom, where the frequency of the sampling clock signals is relatively a small number of times faster than the data rate of the incoming data stream.
It is another object of this invention to provide a method and apparatus for synchronizing and tracking a data stream and generating a synchronous clock therefrom, where the capture time for locking to the incoming data stream is relatively small as compared to phase lock loop systems.
These and additional objects are accomplished by the various aspects of the present invention, wherein, briefly and generally an apparatus for synchronizing and tracking an input data stream and for generating a synchronous clock therefrom is provided, comprising means for generating a plurality of clock signals oscillating at substantially the same frequency, but with different phases; a plurality of delay lines having a common data input for receiving said input data stream, each delay line having multiple delay elements connected in series and having a common clock input for receiving one of said clock signals for clocking data of said data stream along said delay line in a direction away from said common data input; means for detecting which of said plurality of delay lines said data from said data stream is propagating therein; and means for generating the synchronous clock based on one of said clock signals that clocks the delay line that data from said data stream is propagating therein.
A method of synchronizing and tracking a data stream and generating a synchronous clock therefrom is also provided, comprising the steps of generating a plurality of clock signals oscillating at substantially the same frequency, but with different phases; applying each of said clock signals to a corresponding clock input of a plurality of delay lines, each delay line having a common data input for clocking data along said delay line in a direction away from said common data input; applying said data stream to said common data input of said plurality of delay lines; and generating a synchronous clock based on the clock signal that clocks in data into said corresponding delay line of said plurality of delay lines.
Also provided herein is an apparatus for generating a selected phase of a clock signal, comprising a delay line comprising a plurality of delay elements and having an input for receiving said clock signal; a memory device for sampling therein the data outputs of said delay elements; a device coupled to said memory device for selecting which delay element output produces the selected phase of the clock signal; and a gating device coupled to the outputs of said delay elements and to the selecting device for gating the output of the delay element that produces the selected phase of the base clock signal.
Additional objects, features and advantages of various aspects of the present invention will become apparent from the following description of its preferred embodiments, which description should be taken in conjunction with the accompanying drawings.